libriscv 1.0.1

A RISC-V emulator in pure Dart supporting RV32/RV64 with M, A, F, D, C extensions, virtual memory, SBI runtime, and Linux/xv6 boot.

1.0.1

• Documentation: added dartdoc to the public API surface (device and memory abstractions in lib/src/api/, the basic memory map and device, the RV32 and RV64 HARTs, and the CSRAddress / RegisterFile helpers).

1.0.0

Initial pub.dev release.

Architecture and ISA

• Complete RV32I / RV64I base instruction sets
• M (mul/div), A (atomic), F / D (single/double FP), C (compressed)
• Zicsr and Zifencei
• Sstc supervisor timer extension (RV64)
• SV32 (RV32) and SV39 (RV64) virtual memory with TLB
• Machine, Supervisor, and User privilege modes

SBI and boot

• Built-in SBI runtime (v0.1 legacy + v0.3 extensions) for both RV32 and RV64
• Direct-boot paths for Linux 6.6 on both architectures (BusyBox userspace)
• xv6 RV64 boot via VirtIO disk

Devices

• UART 16550A, CLINT, PLIC, VirtIO block, HTIF

Tests

• 217 RISC-V compliance tests pass (94 RV32 + 123 RV64)