libriscv library
LibRISCV - A RISC-V emulator implementation in Dart
This library provides a complete RISC-V emulator with support for:
- RV32I/RV64I base instruction sets
- M, A, F, C extensions
- Supervisor mode and virtual memory
- Device emulation (UART, CLINT, PLIC)
- Linux boot support
Classes
- BasicMemoryDevice
- A MemoryMappedDevice backed by a contiguous ByteData buffer.
- BasicMemoryMap
- Simple MemoryMap backed by a linear list of installed segments.
- CLINT
- Core Local Interruptor (CLINT)
- ClintHartAdapter
- ClintHartInterface
- Minimal interface for CLINT to interact with hart CSRs.
- CSRAddress
- CSR address constants, grouped by category (counters, trap setup, trap handling, memory protection, debug, floating-point).
- CSRExceptionAdapter
- Adapter from UnifiedCSRSystem to ExceptionCSRAccess
- CSRPermission
- CSR access permissions
- Device
- Marker interface for anything that plugs into the emulator as a device.
- DeviceTree
- Device Tree Blob (DTB) Generator
- Emulator
- Unified emulator supporting both RV32 and RV64 architectures
- EmulatorBuilder
- Builder for configuring and creating emulator instances
- ExceptionCode
- Exception codes for MCAUSE and SCAUSE registers
- ExceptionCSRAccess
- Abstract interface for CSR access needed by exception handler
- HartCSRInterface
- Interface for HART CSR system access
- HTIF
- HTIF (Host-Target Interface) Device
- InterruptBits
- Interrupt bit positions for MIE, MIP, SIE, SIP registers
- InterruptCause
- Interrupt cause codes for MCAUSE/SCAUSE (NOT bit positions)
- LinuxLoader
- Linux kernel boot loader for RISC-V
- MemoryMap
- A physical address space composed of MemoryMappedDevices.
- MemoryMappedDevice
- A Device that exposes a contiguous window of memory-mapped registers.
- MISABits
- CSR bit field definitions for MISA register
- MStatusBits
- CSR bit field definitions for MSTATUS register
- PageBasedMemoryMap
- Dense page-based memory map using a List for page table. Pre-allocates entries for the entire address range. Best for: Linux boot, large contiguous RAM, performance-critical scenarios.
- PLIC
- Platform-Level Interrupt Controller (PLIC)
- PLICHartAdapter
- Adapter from HARTInterface to HartCSRInterface
- PrivilegeLevel
- Privilege levels
- RegisterFile
- XLEN-aware integer register file (x0..x31).
- RV32HART
- 32-bit RISC-V Hardware Thread.
- RV64HART
- 64-bit RISC-V Hardware Thread.
- RV64IBaseEmulator
- RV64I Base Instructions Emulator Implements RV32I instructions but with 64-bit register operations This is the base ISA that RV64I extends
- RV64IEmulator
- RV64IExtension
- RV64IHandler
- RV64MHandler
- RV64M extension handler interface
- RV64MHandlerAdapter
- RV64M Handler that implements RV32MHandler interface for 64-bit operations
- RV64MMU
- Memory Management Unit for RISC-V SV39 (RV64)
- RV64TLBEntry
- TLB Entry for caching address translations in RV64
- SATPBits
- SATP register bit fields
- SparsePageBasedMemoryMap
- Sparse page-based memory map using a Map for page table. Only allocates entries for mapped pages. Best for: typical emulation, varied memory layouts, I/O regions.
- SV39PageTableEntry
- SV39 Page Table Entry for RV64
- UART16550A
- UART 16550A Serial Controller
- UnifiedCSRSystem
- Unified CSR System for both RV32 and RV64
- UnifiedExceptionHandler
- Unified exception handler for both RV32 and RV64
- VirtIOBlockDevice
- VirtIO Block Device for RISC-V emulation
- VirtIOConsole
- VirtIO Console Device
- VirtQueue
- Simple VirtQueue implementation
Enums
- DecodeErrorType
- Exception type for instruction decode failures
- MemoryProtections
- Access-permission bits attached to a memory region.
- MemoryStrategy
- Memory map strategy for the emulator
- XLEN
- Available XLEN configurations
Typedefs
- CustomCSRReadCallback = (bool, int) Function(int address)
- CustomCSRWriteCallback = bool Function(int address, int value)
- Callback for custom CSR access (returns true if handled)
- SBIHandler = void Function()
- Callback type for SBI ecall handling
- TLBFlushCallback = void Function()
- Callback for TLB flush when SATP changes
- TriggerReadCallback = int Function(int address)
- Callback for trigger system access
- TriggerWriteCallback = void Function(int address, int value)
Exceptions / Errors
- CSRAccessException
- Exception thrown when CSR access is not permitted
- DecodeException
- Exception thrown when instruction decoding fails