# swizzle function

Performs a concatenation operation on the list of signals, where index 0 of
`signals`

is the *most* significant bit(s).

This is the one you should use if you're writing something like
SystemVerilog's `{}`

notation. If you write `swizzle([a, b, c])`

you would
get a single output Logic where the bits in `a`

are the most significant
(highest) bits.

If you want the opposite, check out rswizzle().

## Implementation

```
@Deprecated('Use `List<Logic>.swizzle()` instead')
Logic swizzle(List<Logic> signals) => signals.swizzle();
```