opencl library

Constants

CL_A → const int
CL_ABGR → const int
CL_ACCELERATOR_CONTEXT_INTEL → const int
CL_ACCELERATOR_DESCRIPTOR_INTEL → const int
CL_ACCELERATOR_REFERENCE_COUNT_INTEL → const int
CL_ACCELERATOR_TYPE_INTEL → const int
CL_ACCELERATOR_TYPE_MOTION_ESTIMATION_INTEL → const int
CL_ACCELERATOR_TYPE_NOT_SUPPORTED_INTEL → const int
CL_ADDRESS_CLAMP → const int
CL_ADDRESS_CLAMP_TO_EDGE → const int
CL_ADDRESS_MIRRORED_REPEAT → const int
CL_ADDRESS_NONE → const int
CL_ADDRESS_REPEAT → const int
CL_AFFINITY_DOMAIN_L1_CACHE_EXT → const int
CL_AFFINITY_DOMAIN_L2_CACHE_EXT → const int
CL_AFFINITY_DOMAIN_L3_CACHE_EXT → const int
CL_AFFINITY_DOMAIN_L4_CACHE_EXT → const int
CL_AFFINITY_DOMAIN_NEXT_FISSIONABLE_EXT → const int
CL_AFFINITY_DOMAIN_NUMA_EXT → const int
cl_APPLE_ContextLoggingFunctions → const int
cl_APPLE_SetMemObjectDestructor → const int
CL_ARGB → const int
cl_arm_controlled_kernel_termination → const int
cl_arm_get_core_id → const int
cl_arm_import_memory → const int
cl_arm_job_slot_selection → const int
cl_arm_protected_memory_allocation → const int
cl_arm_scheduling_controls → const int
cl_arm_shared_virtual_memory → const int
CL_AVC_ME_BIDIR_WEIGHT_HALF_INTEL → const int
CL_AVC_ME_BIDIR_WEIGHT_QUARTER_INTEL → const int
CL_AVC_ME_BIDIR_WEIGHT_THIRD_INTEL → const int
CL_AVC_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL → const int
CL_AVC_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL → const int
CL_AVC_ME_BLOCK_BASED_SKIP_4x4_INTEL → const int
CL_AVC_ME_BLOCK_BASED_SKIP_8x8_INTEL → const int
CL_AVC_ME_BORDER_REACHED_BOTTOM_INTEL → const int
CL_AVC_ME_BORDER_REACHED_LEFT_INTEL → const int
CL_AVC_ME_BORDER_REACHED_RIGHT_INTEL → const int
CL_AVC_ME_BORDER_REACHED_TOP_INTEL → const int
CL_AVC_ME_CHROMA_PREDICTOR_MODE_DC_INTEL → const int
CL_AVC_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL → const int
CL_AVC_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL → const int
CL_AVC_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL → const int
CL_AVC_ME_COST_PRECISION_DPEL_INTEL → const int
CL_AVC_ME_COST_PRECISION_HPEL_INTEL → const int
CL_AVC_ME_COST_PRECISION_PEL_INTEL → const int
CL_AVC_ME_COST_PRECISION_QPEL_INTEL → const int
CL_AVC_ME_FRAME_BACKWARD_INTEL → const int
CL_AVC_ME_FRAME_DUAL_INTEL → const int
CL_AVC_ME_FRAME_FORWARD_INTEL → const int
CL_AVC_ME_INTERLACED_SCAN_BOTTOM_FIELD_INTEL → const int
CL_AVC_ME_INTERLACED_SCAN_TOP_FIELD_INTEL → const int
CL_AVC_ME_INTRA_16x16_INTEL → const int
CL_AVC_ME_INTRA_4x4_INTEL → const int
CL_AVC_ME_INTRA_8x8_INTEL → const int
CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_16x16_INTEL → const int
CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_4x4_INTEL → const int
CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_8x8_INTEL → const int
CL_AVC_ME_INTRA_NEIGHBOR_LEFT_MASK_ENABLE_INTEL → const int
CL_AVC_ME_INTRA_NEIGHBOR_UPPER_LEFT_MASK_ENABLE_INTEL → const int
CL_AVC_ME_INTRA_NEIGHBOR_UPPER_MASK_ENABLE_INTEL → const int
CL_AVC_ME_INTRA_NEIGHBOR_UPPER_RIGHT_MASK_ENABLE_INTEL → const int
CL_AVC_ME_LUMA_PREDICTOR_MODE_DC_INTEL → const int
CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL → const int
CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL → const int
CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL → const int
CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL → const int
CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL → const int
CL_AVC_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL → const int
CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL → const int
CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL → const int
CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL → const int
CL_AVC_ME_MAJOR_16x16_INTEL → const int
CL_AVC_ME_MAJOR_16x8_INTEL → const int
CL_AVC_ME_MAJOR_8x16_INTEL → const int
CL_AVC_ME_MAJOR_8x8_INTEL → const int
CL_AVC_ME_MAJOR_BACKWARD_INTEL → const int
CL_AVC_ME_MAJOR_BIDIRECTIONAL_INTEL → const int
CL_AVC_ME_MAJOR_FORWARD_INTEL → const int
CL_AVC_ME_MINOR_4x4_INTEL → const int
CL_AVC_ME_MINOR_4x8_INTEL → const int
CL_AVC_ME_MINOR_8x4_INTEL → const int
CL_AVC_ME_MINOR_8x8_INTEL → const int
CL_AVC_ME_PARTITION_MASK_16x16_INTEL → const int
CL_AVC_ME_PARTITION_MASK_16x8_INTEL → const int
CL_AVC_ME_PARTITION_MASK_4x4_INTEL → const int
CL_AVC_ME_PARTITION_MASK_4x8_INTEL → const int
CL_AVC_ME_PARTITION_MASK_8x16_INTEL → const int
CL_AVC_ME_PARTITION_MASK_8x4_INTEL → const int
CL_AVC_ME_PARTITION_MASK_8x8_INTEL → const int
CL_AVC_ME_PARTITION_MASK_ALL_INTEL → const int
CL_AVC_ME_SAD_ADJUST_MODE_HAAR_INTEL → const int
CL_AVC_ME_SAD_ADJUST_MODE_NONE_INTEL → const int
CL_AVC_ME_SEARCH_WINDOW_16x12_RADIUS_INTEL → const int
CL_AVC_ME_SEARCH_WINDOW_2x2_RADIUS_INTEL → const int
CL_AVC_ME_SEARCH_WINDOW_4x4_RADIUS_INTEL → const int
CL_AVC_ME_SEARCH_WINDOW_CUSTOM_INTEL → const int
CL_AVC_ME_SEARCH_WINDOW_DIAMOND_INTEL → const int
CL_AVC_ME_SEARCH_WINDOW_EXHAUSTIVE_INTEL → const int
CL_AVC_ME_SEARCH_WINDOW_EXTRA_TINY_INTEL → const int
CL_AVC_ME_SEARCH_WINDOW_LARGE_DIAMOND_INTEL → const int
CL_AVC_ME_SEARCH_WINDOW_RESERVED0_INTEL → const int
CL_AVC_ME_SEARCH_WINDOW_RESERVED1_INTEL → const int
CL_AVC_ME_SEARCH_WINDOW_SMALL_INTEL → const int
CL_AVC_ME_SEARCH_WINDOW_TINY_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_16x16_BACKWARD_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_16x16_DUAL_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_16x16_FORWARD_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_8x8_0_BACKWARD_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_8x8_0_FORWARD_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_8x8_1_BACKWARD_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_8x8_1_FORWARD_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_8x8_2_BACKWARD_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_8x8_2_FORWARD_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_8x8_3_BACKWARD_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_8x8_3_FORWARD_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_8x8_BACKWARD_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_8x8_DUAL_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_8x8_FORWARD_ENABLE_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_PARTITION_16x16_INTEL → const int
CL_AVC_ME_SKIP_BLOCK_PARTITION_8x8_INTEL → const int
CL_AVC_ME_SLICE_TYPE_BPRED_INTEL → const int
CL_AVC_ME_SLICE_TYPE_INTRA_INTEL → const int
CL_AVC_ME_SLICE_TYPE_PRED_INTEL → const int
CL_AVC_ME_SUBPIXEL_MODE_HPEL_INTEL → const int
CL_AVC_ME_SUBPIXEL_MODE_INTEGER_INTEL → const int
CL_AVC_ME_SUBPIXEL_MODE_QPEL_INTEL → const int
CL_AVC_ME_VERSION_0_INTEL → const int
CL_AVC_ME_VERSION_1_INTEL → const int
CL_BGRA → const int
CL_BLOCKING → const int
CL_BUFFER_CREATE_TYPE_REGION → const int
CL_BUILD_ERROR → const int
CL_BUILD_IN_PROGRESS → const int
CL_BUILD_NONE → const int
CL_BUILD_PROGRAM_FAILURE → const int
CL_BUILD_SUCCESS → const int
CL_CGL_SHAREGROUP_KHR → const int
CL_CHAR_BIT → const int
CL_CHAR_MAX → const int
CL_CHAR_MIN → const int
CL_COMMAND_ACQUIRE_EXTERNAL_MEM_OBJECTS_KHR → const int
CL_COMMAND_ACQUIRE_GL_OBJECTS → const int
CL_COMMAND_ACQUIRE_GRALLOC_OBJECTS_IMG → const int
CL_COMMAND_BARRIER → const int
CL_COMMAND_BUFFER_CAPABILITY_DEVICE_SIDE_ENQUEUE_KHR → const int
CL_COMMAND_BUFFER_CAPABILITY_KERNEL_PRINTF_KHR → const int
CL_COMMAND_BUFFER_CAPABILITY_OUT_OF_ORDER_KHR → const int
CL_COMMAND_BUFFER_CAPABILITY_SIMULTANEOUS_USE_KHR → const int
CL_COMMAND_BUFFER_FLAGS_KHR → const int
CL_COMMAND_BUFFER_NUM_QUEUES_KHR → const int
CL_COMMAND_BUFFER_PROPERTIES_ARRAY_KHR → const int
CL_COMMAND_BUFFER_QUEUES_KHR → const int
CL_COMMAND_BUFFER_REFERENCE_COUNT_KHR → const int
CL_COMMAND_BUFFER_SIMULTANEOUS_USE_KHR → const int
CL_COMMAND_BUFFER_STATE_EXECUTABLE_KHR → const int
CL_COMMAND_BUFFER_STATE_INVALID_KHR → const int
CL_COMMAND_BUFFER_STATE_KHR → const int
CL_COMMAND_BUFFER_STATE_PENDING_KHR → const int
CL_COMMAND_BUFFER_STATE_RECORDING_KHR → const int
CL_COMMAND_COMMAND_BUFFER_KHR → const int
CL_COMMAND_COPY_BUFFER → const int
CL_COMMAND_COPY_BUFFER_RECT → const int
CL_COMMAND_COPY_BUFFER_TO_IMAGE → const int
CL_COMMAND_COPY_IMAGE → const int
CL_COMMAND_COPY_IMAGE_TO_BUFFER → const int
CL_COMMAND_FILL_BUFFER → const int
CL_COMMAND_FILL_IMAGE → const int
CL_COMMAND_GENERATE_MIPMAP_IMG → const int
CL_COMMAND_GL_FENCE_SYNC_OBJECT_KHR → const int
CL_COMMAND_MAP_BUFFER → const int
CL_COMMAND_MAP_IMAGE → const int
CL_COMMAND_MARKER → const int
CL_COMMAND_MEMADVISE_INTEL → const int
CL_COMMAND_MEMCPY_INTEL → const int
CL_COMMAND_MEMFILL_INTEL → const int
CL_COMMAND_MIGRATE_MEM_OBJECT_EXT → const int
CL_COMMAND_MIGRATE_MEM_OBJECTS → const int
CL_COMMAND_MIGRATEMEM_INTEL → const int
CL_COMMAND_NATIVE_KERNEL → const int
CL_COMMAND_NDRANGE_KERNEL → const int
CL_COMMAND_READ_BUFFER → const int
CL_COMMAND_READ_BUFFER_RECT → const int
CL_COMMAND_READ_IMAGE → const int
CL_COMMAND_RELEASE_EXTERNAL_MEM_OBJECTS_KHR → const int
CL_COMMAND_RELEASE_GL_OBJECTS → const int
CL_COMMAND_RELEASE_GRALLOC_OBJECTS_IMG → const int
CL_COMMAND_SEMAPHORE_SIGNAL_KHR → const int
CL_COMMAND_SEMAPHORE_WAIT_KHR → const int
CL_COMMAND_SVM_FREE → const int
CL_COMMAND_SVM_FREE_ARM → const int
CL_COMMAND_SVM_MAP → const int
CL_COMMAND_SVM_MAP_ARM → const int
CL_COMMAND_SVM_MEMCPY → const int
CL_COMMAND_SVM_MEMCPY_ARM → const int
CL_COMMAND_SVM_MEMFILL → const int
CL_COMMAND_SVM_MEMFILL_ARM → const int
CL_COMMAND_SVM_MIGRATE_MEM → const int
CL_COMMAND_SVM_UNMAP → const int
CL_COMMAND_SVM_UNMAP_ARM → const int
CL_COMMAND_TASK → const int
CL_COMMAND_TERMINATED_ITSELF_WITH_FAILURE_ARM → const int
CL_COMMAND_TERMINATION_COMPLETION_ARM → const int
CL_COMMAND_TERMINATION_CONTROLLED_FAILURE_ARM → const int
CL_COMMAND_TERMINATION_CONTROLLED_SUCCESS_ARM → const int
CL_COMMAND_TERMINATION_ERROR_ARM → const int
CL_COMMAND_UNMAP_MEM_OBJECT → const int
CL_COMMAND_USER → const int
CL_COMMAND_WRITE_BUFFER → const int
CL_COMMAND_WRITE_BUFFER_RECT → const int
CL_COMMAND_WRITE_IMAGE → const int
CL_COMPILE_PROGRAM_FAILURE → const int
CL_COMPILER_NOT_AVAILABLE → const int
CL_COMPLETE → const int
CL_CONTEXT_DEVICES → const int
CL_CONTEXT_DIAGNOSTICS_LEVEL_ALL_INTEL → const int
CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL → const int
CL_CONTEXT_DIAGNOSTICS_LEVEL_GOOD_INTEL → const int
CL_CONTEXT_DIAGNOSTICS_LEVEL_NEUTRAL_INTEL → const int
CL_CONTEXT_INTEROP_USER_SYNC → const int
CL_CONTEXT_MEMORY_INITIALIZE_KHR → const int
CL_CONTEXT_NUM_DEVICES → const int
CL_CONTEXT_PLATFORM → const int
CL_CONTEXT_PROPERTIES → const int
CL_CONTEXT_REFERENCE_COUNT → const int
CL_CONTEXT_SHOW_DIAGNOSTICS_INTEL → const int
CL_CONTEXT_TERMINATE_KHR → const int
CL_CONTEXT_TERMINATED_KHR → const int
CL_CURRENT_DEVICE_FOR_GL_CONTEXT_KHR → const int
CL_DBL_DIG → const int
CL_DBL_EPSILON → const double
CL_DBL_MANT_DIG → const int
CL_DBL_MAX → const double
CL_DBL_MAX_10_EXP → const int
CL_DBL_MAX_EXP → const int
CL_DBL_MIN → const double
CL_DBL_MIN_10_EXP → const int
CL_DBL_MIN_EXP → const int
CL_DBL_RADIX → const int
CL_DEPTH → const int
CL_DEPTH_STENCIL → const int
CL_DEVICE_ADDRESS_BITS → const int
CL_DEVICE_AFFINITY_DOMAIN_L1_CACHE → const int
CL_DEVICE_AFFINITY_DOMAIN_L2_CACHE → const int
CL_DEVICE_AFFINITY_DOMAIN_L3_CACHE → const int
CL_DEVICE_AFFINITY_DOMAIN_L4_CACHE → const int
CL_DEVICE_AFFINITY_DOMAIN_NEXT_PARTITIONABLE → const int
CL_DEVICE_AFFINITY_DOMAIN_NUMA → const int
CL_DEVICE_AFFINITY_DOMAINS_EXT → const int
CL_DEVICE_ATOMIC_FENCE_CAPABILITIES → const int
CL_DEVICE_ATOMIC_MEMORY_CAPABILITIES → const int
CL_DEVICE_ATOMIC_ORDER_ACQ_REL → const int
CL_DEVICE_ATOMIC_ORDER_RELAXED → const int
CL_DEVICE_ATOMIC_ORDER_SEQ_CST → const int
CL_DEVICE_ATOMIC_SCOPE_ALL_DEVICES → const int
CL_DEVICE_ATOMIC_SCOPE_DEVICE → const int
CL_DEVICE_ATOMIC_SCOPE_WORK_GROUP → const int
CL_DEVICE_ATOMIC_SCOPE_WORK_ITEM → const int
CL_DEVICE_AVAILABLE → const int
CL_DEVICE_AVAILABLE_ASYNC_QUEUES_AMD → const int
CL_DEVICE_AVC_ME_SUPPORTS_PREEMPTION_INTEL → const int
CL_DEVICE_AVC_ME_SUPPORTS_TEXTURE_SAMPLER_USE_INTEL → const int
CL_DEVICE_AVC_ME_VERSION_INTEL → const int
CL_DEVICE_BOARD_NAME_AMD → const int
CL_DEVICE_BUILT_IN_KERNELS → const int
CL_DEVICE_BUILT_IN_KERNELS_WITH_VERSION → const int
CL_DEVICE_BUILT_IN_KERNELS_WITH_VERSION_KHR → const int
CL_DEVICE_COMMAND_BUFFER_CAPABILITIES_KHR → const int
CL_DEVICE_COMMAND_BUFFER_REQUIRED_QUEUE_PROPERTIES_KHR → const int
CL_DEVICE_COMPILER_AVAILABLE → const int
CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV → const int
CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV → const int
CL_DEVICE_COMPUTE_UNITS_BITFIELD_ARM → const int
CL_DEVICE_CONTROLLED_TERMINATION_CAPABILITIES_ARM → const int
CL_DEVICE_CONTROLLED_TERMINATION_FAILURE_ARM → const int
CL_DEVICE_CONTROLLED_TERMINATION_QUERY_ARM → const int
CL_DEVICE_CONTROLLED_TERMINATION_SUCCESS_ARM → const int
CL_DEVICE_CROSS_DEVICE_SHARED_MEM_CAPABILITIES_INTEL → const int
CL_DEVICE_CXX_FOR_OPENCL_NUMERIC_VERSION_EXT → const int
CL_DEVICE_DEVICE_ENQUEUE_CAPABILITIES → const int
CL_DEVICE_DEVICE_MEM_CAPABILITIES_INTEL → const int
CL_DEVICE_DOUBLE_FP_CONFIG → const int
CL_DEVICE_ENDIAN_LITTLE → const int
CL_DEVICE_ERROR_CORRECTION_SUPPORT → const int
CL_DEVICE_EXECUTION_CAPABILITIES → const int
CL_DEVICE_EXT_MEM_PADDING_IN_BYTES_QCOM → const int
CL_DEVICE_EXTENSIONS → const int
CL_DEVICE_EXTENSIONS_WITH_VERSION → const int
CL_DEVICE_EXTENSIONS_WITH_VERSION_KHR → const int
CL_DEVICE_EXTERNAL_MEMORY_IMPORT_HANDLE_TYPES_KHR → const int
CL_DEVICE_FEATURE_CAPABILITIES_INTEL → const int
CL_DEVICE_FEATURE_FLAG_DP4A_INTEL → const int
CL_DEVICE_FEATURE_FLAG_DPAS_INTEL → const int
CL_DEVICE_GENERIC_ADDRESS_SPACE_SUPPORT → const int
CL_DEVICE_GFXIP_MAJOR_AMD → const int
CL_DEVICE_GFXIP_MINOR_AMD → const int
CL_DEVICE_GLOBAL_FREE_MEMORY_AMD → const int
CL_DEVICE_GLOBAL_MEM_CACHE_SIZE → const int
CL_DEVICE_GLOBAL_MEM_CACHE_TYPE → const int
CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE → const int
CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD → const int
CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD → const int
CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD → const int
CL_DEVICE_GLOBAL_MEM_SIZE → const int
CL_DEVICE_GLOBAL_VARIABLE_PREFERRED_TOTAL_SIZE → const int
CL_DEVICE_GPU_OVERLAP_NV → const int
CL_DEVICE_HALF_FP_CONFIG → const int
CL_DEVICE_HANDLE_LIST_END_KHR → const int
CL_DEVICE_HANDLE_LIST_KHR → const int
CL_DEVICE_HOST_MEM_CAPABILITIES_INTEL → const int
CL_DEVICE_HOST_UNIFIED_MEMORY → const int
CL_DEVICE_ID_INTEL → const int
CL_DEVICE_IL_VERSION → const int
CL_DEVICE_IL_VERSION_KHR → const int
CL_DEVICE_ILS_WITH_VERSION → const int
CL_DEVICE_ILS_WITH_VERSION_KHR → const int
CL_DEVICE_IMAGE2D_MAX_HEIGHT → const int
CL_DEVICE_IMAGE2D_MAX_WIDTH → const int
CL_DEVICE_IMAGE3D_MAX_DEPTH → const int
CL_DEVICE_IMAGE3D_MAX_HEIGHT → const int
CL_DEVICE_IMAGE3D_MAX_WIDTH → const int
CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT → const int
CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT_KHR → const int
CL_DEVICE_IMAGE_MAX_ARRAY_SIZE → const int
CL_DEVICE_IMAGE_MAX_BUFFER_SIZE → const int
CL_DEVICE_IMAGE_PITCH_ALIGNMENT → const int
CL_DEVICE_IMAGE_PITCH_ALIGNMENT_KHR → const int
CL_DEVICE_IMAGE_SUPPORT → const int
CL_DEVICE_INTEGER_DOT_PRODUCT_ACCELERATION_PROPERTIES_4x8BIT_PACKED_KHR → const int
CL_DEVICE_INTEGER_DOT_PRODUCT_ACCELERATION_PROPERTIES_8BIT_KHR → const int
CL_DEVICE_INTEGER_DOT_PRODUCT_CAPABILITIES_KHR → const int
CL_DEVICE_INTEGER_DOT_PRODUCT_INPUT_4x8BIT_KHR → const int
CL_DEVICE_INTEGER_DOT_PRODUCT_INPUT_4x8BIT_PACKED_KHR → const int
CL_DEVICE_INTEGRATED_MEMORY_NV → const int
CL_DEVICE_IP_VERSION_INTEL → const int
CL_DEVICE_JOB_SLOTS_ARM → const int
CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV → const int
CL_DEVICE_LATEST_CONFORMANCE_VERSION_PASSED → const int
CL_DEVICE_LINKER_AVAILABLE → const int
CL_DEVICE_LOCAL_MEM_BANKS_AMD → const int
CL_DEVICE_LOCAL_MEM_SIZE → const int
CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD → const int
CL_DEVICE_LOCAL_MEM_TYPE → const int
CL_DEVICE_LUID_KHR → const int
CL_DEVICE_LUID_VALID_KHR → const int
CL_DEVICE_MAX_CLOCK_FREQUENCY → const int
CL_DEVICE_MAX_COMPUTE_UNITS → const int
CL_DEVICE_MAX_CONSTANT_ARGS → const int
CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE → const int
CL_DEVICE_MAX_GLOBAL_VARIABLE_SIZE → const int
CL_DEVICE_MAX_MEM_ALLOC_SIZE → const int
CL_DEVICE_MAX_NAMED_BARRIER_COUNT_KHR → const int
CL_DEVICE_MAX_NUM_SUB_GROUPS → const int
CL_DEVICE_MAX_ON_DEVICE_EVENTS → const int
CL_DEVICE_MAX_ON_DEVICE_QUEUES → const int
CL_DEVICE_MAX_PARAMETER_SIZE → const int
CL_DEVICE_MAX_PIPE_ARGS → const int
CL_DEVICE_MAX_READ_IMAGE_ARGS → const int
CL_DEVICE_MAX_READ_WRITE_IMAGE_ARGS → const int
CL_DEVICE_MAX_SAMPLERS → const int
CL_DEVICE_MAX_WORK_GROUP_SIZE → const int
CL_DEVICE_MAX_WORK_GROUP_SIZE_AMD → const int
CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS → const int
CL_DEVICE_MAX_WORK_ITEM_SIZES → const int
CL_DEVICE_MAX_WRITE_IMAGE_ARGS → const int
CL_DEVICE_ME_VERSION_INTEL → const int
CL_DEVICE_MEM_BASE_ADDR_ALIGN → const int
CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE → const int
CL_DEVICE_NAME → const int
CL_DEVICE_NATIVE_VECTOR_WIDTH_CHAR → const int
CL_DEVICE_NATIVE_VECTOR_WIDTH_DOUBLE → const int
CL_DEVICE_NATIVE_VECTOR_WIDTH_FLOAT → const int
CL_DEVICE_NATIVE_VECTOR_WIDTH_HALF → const int
CL_DEVICE_NATIVE_VECTOR_WIDTH_INT → const int
CL_DEVICE_NATIVE_VECTOR_WIDTH_LONG → const int
CL_DEVICE_NATIVE_VECTOR_WIDTH_SHORT → const int
CL_DEVICE_NODE_MASK_KHR → const int
CL_DEVICE_NON_UNIFORM_WORK_GROUP_SUPPORT → const int
CL_DEVICE_NOT_AVAILABLE → const int
CL_DEVICE_NOT_FOUND → const int
CL_DEVICE_NUM_EUS_PER_SUB_SLICE_INTEL → const int
CL_DEVICE_NUM_SIMULTANEOUS_INTEROPS_INTEL → const int
CL_DEVICE_NUM_SLICES_INTEL → const int
CL_DEVICE_NUM_SUB_SLICES_PER_SLICE_INTEL → const int
CL_DEVICE_NUM_THREADS_PER_EU_INTEL → const int
CL_DEVICE_NUMERIC_VERSION → const int
CL_DEVICE_NUMERIC_VERSION_KHR → const int
CL_DEVICE_OPENCL_C_ALL_VERSIONS → const int
CL_DEVICE_OPENCL_C_FEATURES → const int
CL_DEVICE_OPENCL_C_NUMERIC_VERSION_KHR → const int
CL_DEVICE_OPENCL_C_VERSION → const int
CL_DEVICE_PAGE_SIZE_QCOM → const int
CL_DEVICE_PARENT_DEVICE → const int
CL_DEVICE_PARENT_DEVICE_EXT → const int
CL_DEVICE_PARTITION_AFFINITY_DOMAIN → const int
CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN → const int
CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN_EXT → const int
CL_DEVICE_PARTITION_BY_COUNTS → const int
CL_DEVICE_PARTITION_BY_COUNTS_EXT → const int
CL_DEVICE_PARTITION_BY_COUNTS_LIST_END → const int
CL_DEVICE_PARTITION_BY_NAMES_EXT → const int
CL_DEVICE_PARTITION_BY_NAMES_INTEL → const int
CL_DEVICE_PARTITION_EQUALLY → const int
CL_DEVICE_PARTITION_EQUALLY_EXT → const int
CL_DEVICE_PARTITION_FAILED → const int
CL_DEVICE_PARTITION_FAILED_EXT → const int
CL_DEVICE_PARTITION_MAX_SUB_DEVICES → const int
CL_DEVICE_PARTITION_PROPERTIES → const int
CL_DEVICE_PARTITION_STYLE_EXT → const int
CL_DEVICE_PARTITION_TYPE → const int
CL_DEVICE_PARTITION_TYPES_EXT → const int
CL_DEVICE_PCI_BUS_INFO_KHR → const int
CL_DEVICE_PCIE_ID_AMD → const int
CL_DEVICE_PIPE_MAX_ACTIVE_RESERVATIONS → const int
CL_DEVICE_PIPE_MAX_PACKET_SIZE → const int
CL_DEVICE_PIPE_SUPPORT → const int
CL_DEVICE_PLANAR_YUV_MAX_HEIGHT_INTEL → const int
CL_DEVICE_PLANAR_YUV_MAX_WIDTH_INTEL → const int
CL_DEVICE_PLATFORM → const int
CL_DEVICE_PREFERRED_CONSTANT_BUFFER_SIZE_AMD → const int
CL_DEVICE_PREFERRED_GLOBAL_ATOMIC_ALIGNMENT → const int
CL_DEVICE_PREFERRED_INTEROP_USER_SYNC → const int
CL_DEVICE_PREFERRED_LOCAL_ATOMIC_ALIGNMENT → const int
CL_DEVICE_PREFERRED_PLATFORM_ATOMIC_ALIGNMENT → const int
CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR → const int
CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE → const int
CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT → const int
CL_DEVICE_PREFERRED_VECTOR_WIDTH_HALF → const int
CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT → const int
CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG → const int
CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT → const int
CL_DEVICE_PREFERRED_WORK_GROUP_SIZE_AMD → const int
CL_DEVICE_PREFERRED_WORK_GROUP_SIZE_MULTIPLE → const int
CL_DEVICE_PRINTF_BUFFER_SIZE → const int
CL_DEVICE_PROFILE → const int
CL_DEVICE_PROFILING_TIMER_OFFSET_AMD → const int
CL_DEVICE_PROFILING_TIMER_RESOLUTION → const int
CL_DEVICE_QUEUE_FAMILY_PROPERTIES_INTEL → const int
CL_DEVICE_QUEUE_ON_DEVICE_MAX_SIZE → const int
CL_DEVICE_QUEUE_ON_DEVICE_PREFERRED_SIZE → const int
CL_DEVICE_QUEUE_ON_DEVICE_PROPERTIES → const int
CL_DEVICE_QUEUE_ON_HOST_PROPERTIES → const int
CL_DEVICE_QUEUE_PROPERTIES → const int
CL_DEVICE_QUEUE_REPLACEABLE_DEFAULT → const int
CL_DEVICE_QUEUE_SUPPORTED → const int
CL_DEVICE_REFERENCE_COUNT → const int
CL_DEVICE_REFERENCE_COUNT_EXT → const int
CL_DEVICE_REGISTERS_PER_BLOCK_NV → const int
CL_DEVICE_SCHEDULING_CONTROLS_CAPABILITIES_ARM → const int
CL_DEVICE_SCHEDULING_DEFERRED_FLUSH_ARM → const int
CL_DEVICE_SCHEDULING_KERNEL_BATCHING_ARM → const int
CL_DEVICE_SCHEDULING_REGISTER_ALLOCATION_ARM → const int
CL_DEVICE_SCHEDULING_WORKGROUP_BATCH_SIZE_ARM → const int
CL_DEVICE_SCHEDULING_WORKGROUP_BATCH_SIZE_MODIFIER_ARM → const int
CL_DEVICE_SEMAPHORE_EXPORT_HANDLE_TYPES_KHR → const int
CL_DEVICE_SEMAPHORE_IMPORT_HANDLE_TYPES_KHR → const int
CL_DEVICE_SEMAPHORE_TYPES_KHR → const int
CL_DEVICE_SHARED_SYSTEM_MEM_CAPABILITIES_INTEL → const int
CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD → const int
CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD → const int
CL_DEVICE_SIMD_WIDTH_AMD → const int
CL_DEVICE_SIMULTANEOUS_INTEROPS_INTEL → const int
CL_DEVICE_SINGLE_DEVICE_SHARED_MEM_CAPABILITIES_INTEL → const int
CL_DEVICE_SINGLE_FP_CONFIG → const int
CL_DEVICE_SPIR_VERSIONS → const int
CL_DEVICE_SUB_GROUP_INDEPENDENT_FORWARD_PROGRESS → const int
CL_DEVICE_SUB_GROUP_SIZES_INTEL → const int
CL_DEVICE_SUPPORTED_REGISTER_ALLOCATIONS_ARM → const int
CL_DEVICE_SVM_ATOMICS → const int
CL_DEVICE_SVM_ATOMICS_ARM → const int
CL_DEVICE_SVM_CAPABILITIES → const int
CL_DEVICE_SVM_CAPABILITIES_ARM → const int
CL_DEVICE_SVM_COARSE_GRAIN_BUFFER → const int
CL_DEVICE_SVM_COARSE_GRAIN_BUFFER_ARM → const int
CL_DEVICE_SVM_FINE_GRAIN_BUFFER → const int
CL_DEVICE_SVM_FINE_GRAIN_BUFFER_ARM → const int
CL_DEVICE_SVM_FINE_GRAIN_SYSTEM → const int
CL_DEVICE_SVM_FINE_GRAIN_SYSTEM_ARM → const int
CL_DEVICE_TERMINATE_CAPABILITY_KHR → const int
CL_DEVICE_THREAD_TRACE_SUPPORTED_AMD → const int
CL_DEVICE_TOPOLOGY_AMD → const int
CL_DEVICE_TYPE → const int
CL_DEVICE_TYPE_ACCELERATOR → const int
CL_DEVICE_TYPE_ALL → const int
CL_DEVICE_TYPE_CPU → const int
CL_DEVICE_TYPE_CUSTOM → const int
CL_DEVICE_TYPE_DEFAULT → const int
CL_DEVICE_TYPE_GPU → const int
CL_DEVICE_UUID_KHR → const int
CL_DEVICE_VENDOR → const int
CL_DEVICE_VENDOR_ID → const int
CL_DEVICE_VERSION → const int
CL_DEVICE_WARP_SIZE_NV → const int
CL_DEVICE_WAVEFRONT_WIDTH_AMD → const int
CL_DEVICE_WORK_GROUP_COLLECTIVE_FUNCTIONS_SUPPORT → const int
CL_DEVICES_FOR_GL_CONTEXT_KHR → const int
CL_DRIVER_UUID_KHR → const int
CL_DRIVER_VERSION → const int
CL_EGL_DISPLAY_KHR → const int
CL_EGL_YUV_PLANE_INTEL → const int
CL_EVENT_COMMAND_EXECUTION_STATUS → const int
CL_EVENT_COMMAND_QUEUE → const int
CL_EVENT_COMMAND_TERMINATION_REASON_ARM → const int
CL_EVENT_COMMAND_TYPE → const int
CL_EVENT_CONTEXT → const int
CL_EVENT_REFERENCE_COUNT → const int
CL_EXEC_KERNEL → const int
CL_EXEC_NATIVE_KERNEL → const int
CL_EXEC_STATUS_ERROR_FOR_EVENTS_IN_WAIT_LIST → const int
cl_ext_cxx_for_opencl → const int
cl_ext_device_fission → const int
cl_ext_image_from_buffer → const int
cl_ext_image_requirements_info → const int
cl_ext_migrate_memobject → const int
CL_EXTERNAL_MEMORY_HANDLE_D3D11_TEXTURE_KHR → const int
CL_EXTERNAL_MEMORY_HANDLE_D3D11_TEXTURE_KMT_KHR → const int
CL_EXTERNAL_MEMORY_HANDLE_D3D12_HEAP_KHR → const int
CL_EXTERNAL_MEMORY_HANDLE_D3D12_RESOURCE_KHR → const int
CL_EXTERNAL_MEMORY_HANDLE_DMA_BUF_KHR → const int
CL_EXTERNAL_MEMORY_HANDLE_OPAQUE_FD_KHR → const int
CL_EXTERNAL_MEMORY_HANDLE_OPAQUE_WIN32_KHR → const int
CL_EXTERNAL_MEMORY_HANDLE_OPAQUE_WIN32_KMT_KHR → const int
CL_FALSE → const int
CL_FILTER_LINEAR → const int
CL_FILTER_NEAREST → const int
CL_FLOAT → const int
CL_FLT_DIG → const int
CL_FLT_EPSILON → const double
CL_FLT_MANT_DIG → const int
CL_FLT_MAX → const double
CL_FLT_MAX_10_EXP → const int
CL_FLT_MAX_EXP → const int
CL_FLT_MIN → const double
CL_FLT_MIN_10_EXP → const int
CL_FLT_MIN_EXP → const int
CL_FLT_RADIX → const int
CL_FP_CORRECTLY_ROUNDED_DIVIDE_SQRT → const int
CL_FP_DENORM → const int
CL_FP_FMA → const int
CL_FP_INF_NAN → const int
CL_FP_ROUND_TO_INF → const int
CL_FP_ROUND_TO_NEAREST → const int
CL_FP_ROUND_TO_ZERO → const int
CL_FP_SOFT_FLOAT → const int
CL_GL_CONTEXT_KHR → const int
CL_GL_MIPMAP_LEVEL → const int
CL_GL_NUM_SAMPLES → const int
CL_GL_OBJECT_BUFFER → const int
CL_GL_OBJECT_RENDERBUFFER → const int
CL_GL_OBJECT_TEXTURE1D → const int
CL_GL_OBJECT_TEXTURE1D_ARRAY → const int
CL_GL_OBJECT_TEXTURE2D → const int
CL_GL_OBJECT_TEXTURE2D_ARRAY → const int
CL_GL_OBJECT_TEXTURE3D → const int
CL_GL_OBJECT_TEXTURE_BUFFER → const int
CL_GL_TEXTURE_TARGET → const int
CL_GLOBAL → const int
CL_GLX_DISPLAY_KHR → const int
CL_GRALLOC_RESOURCE_NOT_ACQUIRED_IMG → const int
CL_HALF_DIG → const int
CL_HALF_EPSILON → const double
CL_HALF_FLOAT → const int
CL_HALF_MANT_DIG → const int
CL_HALF_MAX → const double
CL_HALF_MAX_10_EXP → const int
CL_HALF_MAX_EXP → const int
CL_HALF_MIN → const double
CL_HALF_MIN_10_EXP → const int
CL_HALF_MIN_EXP → const int
CL_HALF_RADIX → const int
CL_HAS_HI_LO_VECTOR_FIELDS → const int
CL_HAS_NAMED_VECTOR_FIELDS → const int
CL_HUGE_VAL → const double
CL_HUGE_VALF → const double
CL_IMAGE_ARRAY_SIZE → const int
CL_IMAGE_BUFFER → const int
CL_IMAGE_DEPTH → const int
CL_IMAGE_ELEMENT_SIZE → const int
CL_IMAGE_FORMAT → const int
CL_IMAGE_FORMAT_MISMATCH → const int
CL_IMAGE_FORMAT_NOT_SUPPORTED → const int
CL_IMAGE_HEIGHT → const int
CL_IMAGE_NUM_MIP_LEVELS → const int
CL_IMAGE_NUM_SAMPLES → const int
CL_IMAGE_REQUIREMENTS_BASE_ADDRESS_ALIGNMENT_EXT → const int
CL_IMAGE_REQUIREMENTS_MAX_ARRAY_SIZE_EXT → const int
CL_IMAGE_REQUIREMENTS_MAX_DEPTH_EXT → const int
CL_IMAGE_REQUIREMENTS_MAX_HEIGHT_EXT → const int
CL_IMAGE_REQUIREMENTS_MAX_WIDTH_EXT → const int
CL_IMAGE_REQUIREMENTS_ROW_PITCH_ALIGNMENT_EXT → const int
CL_IMAGE_REQUIREMENTS_SIZE_EXT → const int
CL_IMAGE_REQUIREMENTS_SLICE_PITCH_ALIGNMENT_EXT → const int
CL_IMAGE_ROW_ALIGNMENT_QCOM → const int
CL_IMAGE_ROW_PITCH → const int
CL_IMAGE_SLICE_ALIGNMENT_QCOM → const int
CL_IMAGE_SLICE_PITCH → const int
CL_IMAGE_WIDTH → const int
cl_img_generate_mipmap → const int
cl_img_mem_properties → const int
cl_img_use_gralloc_ptr → const int
CL_IMPORT_ANDROID_HARDWARE_BUFFER_LAYER_INDEX_ARM → const int
CL_IMPORT_ANDROID_HARDWARE_BUFFER_PLANE_INDEX_ARM → const int
CL_IMPORT_DMA_BUF_DATA_CONSISTENCY_WITH_HOST_ARM → const int
CL_IMPORT_MEMORY_WHOLE_ALLOCATION_ARM → const int
CL_IMPORT_TYPE_ANDROID_HARDWARE_BUFFER_ARM → const int
CL_IMPORT_TYPE_ARM → const int
CL_IMPORT_TYPE_DMA_BUF_ARM → const int
CL_IMPORT_TYPE_HOST_ARM → const int
CL_IMPORT_TYPE_PROTECTED_ARM → const int
CL_INCOMPATIBLE_COMMAND_QUEUE_KHR → const int
CL_INFINITY → const double
CL_INT_MAX → const int
CL_INT_MIN → const int
cl_intel_accelerator → const int
cl_intel_advanced_motion_estimation → const int
cl_intel_command_queue_families → const int
cl_intel_create_buffer_with_properties → const int
cl_intel_device_attribute_query → const int
cl_intel_device_partition_by_names → const int
cl_intel_driver_diagnostics → const int
cl_intel_egl_image_yuv → const int
cl_intel_exec_by_local_thread → const int
cl_intel_mem_alloc_buffer_location → const int
CL_INTEL_MEM_ALLOC_BUFFER_LOCATION_EXTENSION_NAME → const String
cl_intel_mem_force_host_memory → const int
cl_intel_motion_estimation → const int
cl_intel_packed_yuv → const int
cl_intel_required_subgroup_size → const int
cl_intel_sharing_format_query → const int
cl_intel_sharing_format_query_gl → const int
cl_intel_simultaneous_sharing → const int
cl_intel_unified_shared_memory → const int
CL_INTENSITY → const int
CL_INVALID_ACCELERATOR_DESCRIPTOR_INTEL → const int
CL_INVALID_ACCELERATOR_INTEL → const int
CL_INVALID_ACCELERATOR_TYPE_INTEL → const int
CL_INVALID_ARG_INDEX → const int
CL_INVALID_ARG_SIZE → const int
CL_INVALID_ARG_VALUE → const int
CL_INVALID_BINARY → const int
CL_INVALID_BUFFER_SIZE → const int
CL_INVALID_BUILD_OPTIONS → const int
CL_INVALID_COMMAND_BUFFER_KHR → const int
CL_INVALID_COMMAND_QUEUE → const int
CL_INVALID_COMPILER_OPTIONS → const int
CL_INVALID_CONTEXT → const int
CL_INVALID_DEVICE → const int
CL_INVALID_DEVICE_PARTITION_COUNT → const int
CL_INVALID_DEVICE_QUEUE → const int
CL_INVALID_DEVICE_TYPE → const int
CL_INVALID_EVENT → const int
CL_INVALID_EVENT_WAIT_LIST → const int
CL_INVALID_GL_OBJECT → const int
CL_INVALID_GL_SHAREGROUP_REFERENCE_KHR → const int
CL_INVALID_GLOBAL_OFFSET → const int
CL_INVALID_GLOBAL_WORK_SIZE → const int
CL_INVALID_GRALLOC_OBJECT_IMG → const int
CL_INVALID_HOST_PTR → const int
CL_INVALID_IMAGE_DESCRIPTOR → const int
CL_INVALID_IMAGE_FORMAT_DESCRIPTOR → const int
CL_INVALID_IMAGE_SIZE → const int
CL_INVALID_KERNEL → const int
CL_INVALID_KERNEL_ARGS → const int
CL_INVALID_KERNEL_DEFINITION → const int
CL_INVALID_KERNEL_NAME → const int
CL_INVALID_LINKER_OPTIONS → const int
CL_INVALID_MEM_OBJECT → const int
CL_INVALID_MIP_LEVEL → const int
CL_INVALID_OPERATION → const int
CL_INVALID_PARTITION_COUNT_EXT → const int
CL_INVALID_PARTITION_NAME_EXT → const int
CL_INVALID_PIPE_SIZE → const int
CL_INVALID_PLATFORM → const int
CL_INVALID_PROGRAM → const int
CL_INVALID_PROGRAM_EXECUTABLE → const int
CL_INVALID_PROPERTY → const int
CL_INVALID_QUEUE_PROPERTIES → const int
CL_INVALID_SAMPLER → const int
CL_INVALID_SEMAPHORE_KHR → const int
CL_INVALID_SPEC_ID → const int
CL_INVALID_SYNC_POINT_WAIT_LIST_KHR → const int
CL_INVALID_VALUE → const int
CL_INVALID_WORK_DIMENSION → const int
CL_INVALID_WORK_GROUP_SIZE → const int
CL_INVALID_WORK_ITEM_SIZE → const int
CL_KERNEL_ARG_ACCESS_NONE → const int
CL_KERNEL_ARG_ACCESS_QUALIFIER → const int
CL_KERNEL_ARG_ACCESS_READ_ONLY → const int
CL_KERNEL_ARG_ACCESS_READ_WRITE → const int
CL_KERNEL_ARG_ACCESS_WRITE_ONLY → const int
CL_KERNEL_ARG_ADDRESS_CONSTANT → const int
CL_KERNEL_ARG_ADDRESS_GLOBAL → const int
CL_KERNEL_ARG_ADDRESS_LOCAL → const int
CL_KERNEL_ARG_ADDRESS_PRIVATE → const int
CL_KERNEL_ARG_ADDRESS_QUALIFIER → const int
CL_KERNEL_ARG_INFO_NOT_AVAILABLE → const int
CL_KERNEL_ARG_NAME → const int
CL_KERNEL_ARG_TYPE_CONST → const int
CL_KERNEL_ARG_TYPE_NAME → const int
CL_KERNEL_ARG_TYPE_NONE → const int
CL_KERNEL_ARG_TYPE_PIPE → const int
CL_KERNEL_ARG_TYPE_QUALIFIER → const int
CL_KERNEL_ARG_TYPE_RESTRICT → const int
CL_KERNEL_ARG_TYPE_VOLATILE → const int
CL_KERNEL_ATTRIBUTES → const int
CL_KERNEL_COMPILE_NUM_SUB_GROUPS → const int
CL_KERNEL_COMPILE_SUB_GROUP_SIZE_INTEL → const int
CL_KERNEL_COMPILE_WORK_GROUP_SIZE → const int
CL_KERNEL_CONTEXT → const int
CL_KERNEL_EXEC_INFO_INDIRECT_DEVICE_ACCESS_INTEL → const int
CL_KERNEL_EXEC_INFO_INDIRECT_HOST_ACCESS_INTEL → const int
CL_KERNEL_EXEC_INFO_INDIRECT_SHARED_ACCESS_INTEL → const int
CL_KERNEL_EXEC_INFO_SVM_FINE_GRAIN_SYSTEM → const int
CL_KERNEL_EXEC_INFO_SVM_FINE_GRAIN_SYSTEM_ARM → const int
CL_KERNEL_EXEC_INFO_SVM_PTRS → const int
CL_KERNEL_EXEC_INFO_SVM_PTRS_ARM → const int
CL_KERNEL_EXEC_INFO_USM_PTRS_INTEL → const int
CL_KERNEL_EXEC_INFO_WORKGROUP_BATCH_SIZE_ARM → const int
CL_KERNEL_EXEC_INFO_WORKGROUP_BATCH_SIZE_MODIFIER_ARM → const int
CL_KERNEL_FUNCTION_NAME → const int
CL_KERNEL_GLOBAL_WORK_SIZE → const int
CL_KERNEL_LOCAL_MEM_SIZE → const int
CL_KERNEL_LOCAL_SIZE_FOR_SUB_GROUP_COUNT → const int
CL_KERNEL_MAX_NUM_SUB_GROUPS → const int
CL_KERNEL_MAX_SUB_GROUP_SIZE_FOR_NDRANGE → const int
CL_KERNEL_MAX_SUB_GROUP_SIZE_FOR_NDRANGE_KHR → const int
CL_KERNEL_NUM_ARGS → const int
CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE → const int
CL_KERNEL_PRIVATE_MEM_SIZE → const int
CL_KERNEL_PROGRAM → const int
CL_KERNEL_REFERENCE_COUNT → const int
CL_KERNEL_SPILL_MEM_SIZE_INTEL → const int
CL_KERNEL_SUB_GROUP_COUNT_FOR_NDRANGE → const int
CL_KERNEL_SUB_GROUP_COUNT_FOR_NDRANGE_KHR → const int
CL_KERNEL_WORK_GROUP_SIZE → const int
cl_khr_command_buffer → const int
CL_KHR_COMMAND_BUFFER_EXTENSION_NAME → const String
cl_khr_create_command_queue → const int
cl_khr_device_uuid → const int
cl_khr_extended_versioning → const int
cl_khr_external_memory → const int
cl_khr_external_memory_dma_buf → const int
cl_khr_external_memory_dx → const int
cl_khr_external_memory_opaque_fd → const int
cl_khr_external_memory_win32 → const int
cl_khr_external_semaphore → const int
cl_khr_external_semaphore_dx_fence → const int
cl_khr_external_semaphore_opaque_fd → const int
cl_khr_external_semaphore_sync_fd → const int
cl_khr_external_semaphore_win32 → const int
cl_khr_gl_sharing → const int
cl_khr_icd → const int
cl_khr_il_program → const int
cl_khr_integer_dot_product → const int
cl_khr_pci_bus_info → const int
cl_khr_priority_hints → const int
cl_khr_semaphore → const int
cl_khr_subgroup_named_barrier → const int
cl_khr_subgroups → const int
cl_khr_suggested_local_work_size → const int
cl_khr_terminate_context → const int
cl_khr_throttle_hints → const int
CL_KHRONOS_VENDOR_ID_CODEPLAY → const int
CL_LINKER_NOT_AVAILABLE → const int
CL_LOCAL → const int
CL_LONG_MAX → const int
CL_LONG_MIN → const int
CL_LUID_SIZE_KHR → const int
CL_LUMINANCE → const int
CL_M_1_PI → const double
CL_M_1_PI_F → const double
CL_M_2_PI → const double
CL_M_2_PI_F → const double
CL_M_2_SQRTPI → const double
CL_M_2_SQRTPI_F → const double
CL_M_E → const double
CL_M_E_F → const double
CL_M_LN10 → const double
CL_M_LN10_F → const double
CL_M_LN2 → const double
CL_M_LN2_F → const double
CL_M_LOG10E → const double
CL_M_LOG10E_F → const double
CL_M_LOG2E → const double
CL_M_LOG2E_F → const double
CL_M_PI → const double
CL_M_PI_2 → const double
CL_M_PI_2_F → const double
CL_M_PI_4 → const double
CL_M_PI_4_F → const double
CL_M_PI_F → const double
CL_M_SQRT1_2 → const double
CL_M_SQRT1_2_F → const double
CL_M_SQRT2 → const double
CL_M_SQRT2_F → const double
CL_MAP_FAILURE → const int
CL_MAP_READ → const int
CL_MAP_WRITE → const int
CL_MAP_WRITE_INVALIDATE_REGION → const int
CL_MAX_SIZE_RESTRICTION_EXCEEDED → const int
CL_MAXFLOAT → const double
CL_ME_BACKWARD_INPUT_MODE_INTEL → const int
CL_ME_BIDIR_WEIGHT_HALF_INTEL → const int
CL_ME_BIDIR_WEIGHT_QUARTER_INTEL → const int
CL_ME_BIDIR_WEIGHT_THIRD_INTEL → const int
CL_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL → const int
CL_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL → const int
CL_ME_BIDIRECTION_INPUT_MODE_INTEL → const int
CL_ME_CHROMA_INTRA_PREDICT_ENABLED_INTEL → const int
CL_ME_CHROMA_PREDICTOR_MODE_DC_INTEL → const int
CL_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL → const int
CL_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL → const int
CL_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL → const int
CL_ME_COST_PENALTY_HIGH_INTEL → const int
CL_ME_COST_PENALTY_LOW_INTEL → const int
CL_ME_COST_PENALTY_NONE_INTEL → const int
CL_ME_COST_PENALTY_NORMAL_INTEL → const int
CL_ME_COST_PRECISION_DPEL_INTEL → const int
CL_ME_COST_PRECISION_HPEL_INTEL → const int
CL_ME_COST_PRECISION_PEL_INTEL → const int
CL_ME_COST_PRECISION_QPEL_INTEL → const int
CL_ME_FORWARD_INPUT_MODE_INTEL → const int
CL_ME_LUMA_INTRA_PREDICT_ENABLED_INTEL → const int
CL_ME_LUMA_PREDICTOR_MODE_DC_INTEL → const int
CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL → const int
CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL → const int
CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL → const int
CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL → const int
CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL → const int
CL_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL → const int
CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL → const int
CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL → const int
CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL → const int
CL_ME_MB_TYPE_16x16_INTEL → const int
CL_ME_MB_TYPE_4x4_INTEL → const int
CL_ME_MB_TYPE_8x8_INTEL → const int
CL_ME_SAD_ADJUST_MODE_HAAR_INTEL → const int
CL_ME_SAD_ADJUST_MODE_NONE_INTEL → const int
CL_ME_SEARCH_PATH_RADIUS_16_12_INTEL → const int
CL_ME_SEARCH_PATH_RADIUS_2_2_INTEL → const int
CL_ME_SEARCH_PATH_RADIUS_4_4_INTEL → const int
CL_ME_SKIP_BLOCK_TYPE_16x16_INTEL → const int
CL_ME_SKIP_BLOCK_TYPE_8x8_INTEL → const int
CL_ME_SUBPIXEL_MODE_HPEL_INTEL → const int
CL_ME_SUBPIXEL_MODE_INTEGER_INTEL → const int
CL_ME_SUBPIXEL_MODE_QPEL_INTEL → const int
CL_ME_VERSION_ADVANCED_VER_1_INTEL → const int
CL_ME_VERSION_ADVANCED_VER_2_INTEL → const int
CL_ME_VERSION_LEGACY_INTEL → const int
CL_MEM_ACCESS_FLAGS_UNRESTRICTED_INTEL → const int
CL_MEM_ALLOC_BASE_PTR_INTEL → const int
CL_MEM_ALLOC_BUFFER_LOCATION_INTEL → const int
CL_MEM_ALLOC_DEVICE_INTEL → const int
CL_MEM_ALLOC_FLAGS_IMG → const int
CL_MEM_ALLOC_FLAGS_INTEL → const int
CL_MEM_ALLOC_HOST_PTR → const int
CL_MEM_ALLOC_INITIAL_PLACEMENT_DEVICE_INTEL → const int
CL_MEM_ALLOC_INITIAL_PLACEMENT_HOST_INTEL → const int
CL_MEM_ALLOC_RELAX_REQUIREMENTS_IMG → const int
CL_MEM_ALLOC_SIZE_INTEL → const int
CL_MEM_ALLOC_TYPE_INTEL → const int
CL_MEM_ALLOC_WRITE_COMBINED_INTEL → const int
CL_MEM_ANDROID_NATIVE_BUFFER_HOST_PTR_QCOM → const int
CL_MEM_ASSOCIATED_MEMOBJECT → const int
CL_MEM_CHANNEL_INTEL → const int
CL_MEM_CONTEXT → const int
CL_MEM_COPY_HOST_PTR → const int
CL_MEM_COPY_OVERLAP → const int
CL_MEM_EXT_HOST_PTR_QCOM → const int
CL_MEM_FLAGS → const int
CL_MEM_FORCE_HOST_MEMORY_INTEL → const int
CL_MEM_HOST_IOCOHERENT_QCOM → const int
CL_MEM_HOST_NO_ACCESS → const int
CL_MEM_HOST_PTR → const int
CL_MEM_HOST_READ_ONLY → const int
CL_MEM_HOST_UNCACHED_QCOM → const int
CL_MEM_HOST_WRITE_COMBINING_QCOM → const int
CL_MEM_HOST_WRITE_ONLY → const int
CL_MEM_HOST_WRITEBACK_QCOM → const int
CL_MEM_HOST_WRITETHROUGH_QCOM → const int
CL_MEM_ION_HOST_PTR_QCOM → const int
CL_MEM_KERNEL_READ_AND_WRITE → const int
CL_MEM_MAP_COUNT → const int
CL_MEM_NO_ACCESS_INTEL → const int
CL_MEM_OBJECT_ALLOCATION_FAILURE → const int
CL_MEM_OBJECT_BUFFER → const int
CL_MEM_OBJECT_IMAGE1D → const int
CL_MEM_OBJECT_IMAGE1D_ARRAY → const int
CL_MEM_OBJECT_IMAGE1D_BUFFER → const int
CL_MEM_OBJECT_IMAGE2D → const int
CL_MEM_OBJECT_IMAGE2D_ARRAY → const int
CL_MEM_OBJECT_IMAGE3D → const int
CL_MEM_OBJECT_PIPE → const int
CL_MEM_OFFSET → const int
CL_MEM_PROPERTIES → const int
CL_MEM_PROTECTED_ALLOC_ARM → const int
CL_MEM_READ_ONLY → const int
CL_MEM_READ_WRITE → const int
CL_MEM_REFERENCE_COUNT → const int
CL_MEM_SIZE → const int
CL_MEM_SVM_ATOMICS → const int
CL_MEM_SVM_ATOMICS_ARM → const int
CL_MEM_SVM_FINE_GRAIN_BUFFER → const int
CL_MEM_SVM_FINE_GRAIN_BUFFER_ARM → const int
CL_MEM_TYPE → const int
CL_MEM_TYPE_DEVICE_INTEL → const int
CL_MEM_TYPE_HOST_INTEL → const int
CL_MEM_TYPE_SHARED_INTEL → const int
CL_MEM_TYPE_UNKNOWN_INTEL → const int
CL_MEM_USE_CACHED_CPU_MEMORY_IMG → const int
CL_MEM_USE_GRALLOC_PTR_IMG → const int
CL_MEM_USE_HOST_PTR → const int
CL_MEM_USE_UNCACHED_CPU_MEMORY_IMG → const int
CL_MEM_USES_SVM_POINTER → const int
CL_MEM_USES_SVM_POINTER_ARM → const int
CL_MEM_WRITE_ONLY → const int
CL_MIGRATE_MEM_OBJECT_CONTENT_UNDEFINED → const int
CL_MIGRATE_MEM_OBJECT_HOST → const int
CL_MIGRATE_MEM_OBJECT_HOST_EXT → const int
CL_MIPMAP_FILTER_ANY_IMG → const int
CL_MIPMAP_FILTER_BOX_IMG → const int
CL_MISALIGNED_SUB_BUFFER_OFFSET → const int
CL_NAME_VERSION_MAX_NAME_SIZE → const int
CL_NAME_VERSION_MAX_NAME_SIZE_KHR → const int
CL_NAN → const double
CL_NON_BLOCKING → const int
CL_NONE → const int
CL_NV12_INTEL → const int
CL_NV21_IMG → const int
CL_OUT_OF_HOST_MEMORY → const int
CL_OUT_OF_RESOURCES → const int
CL_PARTITION_BY_COUNTS_LIST_END_EXT → const int
CL_PARTITION_BY_NAMES_LIST_END_EXT → const int
CL_PARTITION_BY_NAMES_LIST_END_INTEL → const int
CL_PIPE_MAX_PACKETS → const int
CL_PIPE_PACKET_SIZE → const int
CL_PIPE_PROPERTIES → const int
CL_PLATFORM_EXTENSIONS → const int
CL_PLATFORM_EXTENSIONS_WITH_VERSION → const int
CL_PLATFORM_EXTENSIONS_WITH_VERSION_KHR → const int
CL_PLATFORM_EXTERNAL_MEMORY_IMPORT_HANDLE_TYPES_KHR → const int
CL_PLATFORM_HOST_TIMER_RESOLUTION → const int
CL_PLATFORM_ICD_SUFFIX_KHR → const int
CL_PLATFORM_NAME → const int
CL_PLATFORM_NOT_FOUND_KHR → const int
CL_PLATFORM_NUMERIC_VERSION → const int
CL_PLATFORM_NUMERIC_VERSION_KHR → const int
CL_PLATFORM_PROFILE → const int
CL_PLATFORM_SEMAPHORE_EXPORT_HANDLE_TYPES_KHR → const int
CL_PLATFORM_SEMAPHORE_IMPORT_HANDLE_TYPES_KHR → const int
CL_PLATFORM_SEMAPHORE_TYPES_KHR → const int
CL_PLATFORM_VENDOR → const int
CL_PLATFORM_VERSION → const int
CL_PRINTF_BUFFERSIZE_ARM → const int
CL_PRINTF_CALLBACK_ARM → const int
CL_PROFILING_COMMAND_COMPLETE → const int
CL_PROFILING_COMMAND_END → const int
CL_PROFILING_COMMAND_QUEUED → const int
CL_PROFILING_COMMAND_START → const int
CL_PROFILING_COMMAND_SUBMIT → const int
CL_PROFILING_INFO_NOT_AVAILABLE → const int
CL_PROGRAM_BINARIES → const int
CL_PROGRAM_BINARY_SIZES → const int
CL_PROGRAM_BINARY_TYPE → const int
CL_PROGRAM_BINARY_TYPE_COMPILED_OBJECT → const int
CL_PROGRAM_BINARY_TYPE_EXECUTABLE → const int
CL_PROGRAM_BINARY_TYPE_INTERMEDIATE → const int
CL_PROGRAM_BINARY_TYPE_LIBRARY → const int
CL_PROGRAM_BINARY_TYPE_NONE → const int
CL_PROGRAM_BUILD_GLOBAL_VARIABLE_TOTAL_SIZE → const int
CL_PROGRAM_BUILD_LOG → const int
CL_PROGRAM_BUILD_OPTIONS → const int
CL_PROGRAM_BUILD_STATUS → const int
CL_PROGRAM_CONTEXT → const int
CL_PROGRAM_DEVICES → const int
CL_PROGRAM_IL → const int
CL_PROGRAM_IL_KHR → const int
CL_PROGRAM_KERNEL_NAMES → const int
CL_PROGRAM_NUM_DEVICES → const int
CL_PROGRAM_NUM_KERNELS → const int
CL_PROGRAM_REFERENCE_COUNT → const int
CL_PROGRAM_SCOPE_GLOBAL_CTORS_PRESENT → const int
CL_PROGRAM_SCOPE_GLOBAL_DTORS_PRESENT → const int
CL_PROGRAM_SOURCE → const int
CL_PROGRAM_STRING_DEBUG_INFO → const String
CL_PROPERTIES_LIST_END_EXT → const int
cl_qcom_ext_host_ptr → const int
CL_QUEUE_CAPABILITY_BARRIER_INTEL → const int
CL_QUEUE_CAPABILITY_CREATE_CROSS_QUEUE_EVENTS_INTEL → const int
CL_QUEUE_CAPABILITY_CREATE_SINGLE_QUEUE_EVENTS_INTEL → const int
CL_QUEUE_CAPABILITY_CROSS_QUEUE_EVENT_WAIT_LIST_INTEL → const int
CL_QUEUE_CAPABILITY_FILL_BUFFER_INTEL → const int
CL_QUEUE_CAPABILITY_FILL_IMAGE_INTEL → const int
CL_QUEUE_CAPABILITY_KERNEL_INTEL → const int
CL_QUEUE_CAPABILITY_MAP_BUFFER_INTEL → const int
CL_QUEUE_CAPABILITY_MAP_IMAGE_INTEL → const int
CL_QUEUE_CAPABILITY_MARKER_INTEL → const int
CL_QUEUE_CAPABILITY_SINGLE_QUEUE_EVENT_WAIT_LIST_INTEL → const int
CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_IMAGE_INTEL → const int
CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_INTEL → const int
CL_QUEUE_CAPABILITY_TRANSFER_BUFFER_RECT_INTEL → const int
CL_QUEUE_CAPABILITY_TRANSFER_IMAGE_BUFFER_INTEL → const int
CL_QUEUE_CAPABILITY_TRANSFER_IMAGE_INTEL → const int
CL_QUEUE_CONTEXT → const int
CL_QUEUE_DEFAULT_CAPABILITIES_INTEL → const int
CL_QUEUE_DEFERRED_FLUSH_ARM → const int
CL_QUEUE_DEVICE → const int
CL_QUEUE_DEVICE_DEFAULT → const int
CL_QUEUE_FAMILY_INTEL → const int
CL_QUEUE_FAMILY_MAX_NAME_SIZE_INTEL → const int
CL_QUEUE_INDEX_INTEL → const int
CL_QUEUE_JOB_SLOT_ARM → const int
CL_QUEUE_KERNEL_BATCHING_ARM → const int
CL_QUEUE_ON_DEVICE → const int
CL_QUEUE_ON_DEVICE_DEFAULT → const int
CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE → const int
CL_QUEUE_PRIORITY_HIGH_KHR → const int
CL_QUEUE_PRIORITY_KHR → const int
CL_QUEUE_PRIORITY_LOW_KHR → const int
CL_QUEUE_PRIORITY_MED_KHR → const int
CL_QUEUE_PROFILING_ENABLE → const int
CL_QUEUE_PROPERTIES → const int
CL_QUEUE_PROPERTIES_ARRAY → const int
CL_QUEUE_REFERENCE_COUNT → const int
CL_QUEUE_SIZE → const int
CL_QUEUE_THREAD_LOCAL_EXEC_ENABLE_INTEL → const int
CL_QUEUE_THROTTLE_HIGH_KHR → const int
CL_QUEUE_THROTTLE_KHR → const int
CL_QUEUE_THROTTLE_LOW_KHR → const int
CL_QUEUE_THROTTLE_MED_KHR → const int
CL_QUEUED → const int
CL_R → const int
CL_RA → const int
CL_READ_ONLY_CACHE → const int
CL_READ_WRITE_CACHE → const int
CL_RG → const int
CL_RGB → const int
CL_RGBA → const int
CL_RGBx → const int
CL_RGx → const int
CL_RUNNING → const int
CL_Rx → const int
CL_SAMPLER_ADDRESSING_MODE → const int
CL_SAMPLER_CONTEXT → const int
CL_SAMPLER_FILTER_MODE → const int
CL_SAMPLER_LOD_MAX → const int
CL_SAMPLER_LOD_MAX_KHR → const int
CL_SAMPLER_LOD_MIN → const int
CL_SAMPLER_LOD_MIN_KHR → const int
CL_SAMPLER_MIP_FILTER_MODE → const int
CL_SAMPLER_MIP_FILTER_MODE_KHR → const int
CL_SAMPLER_NORMALIZED_COORDS → const int
CL_SAMPLER_PROPERTIES → const int
CL_SAMPLER_REFERENCE_COUNT → const int
CL_sBGRA → const int
CL_SCHAR_MAX → const int
CL_SCHAR_MIN → const int
CL_SEMAPHORE_CONTEXT_KHR → const int
CL_SEMAPHORE_EXPORT_HANDLE_TYPES_KHR → const int
CL_SEMAPHORE_EXPORT_HANDLE_TYPES_LIST_END_KHR → const int
CL_SEMAPHORE_HANDLE_D3D12_FENCE_KHR → const int
CL_SEMAPHORE_HANDLE_OPAQUE_FD_KHR → const int
CL_SEMAPHORE_HANDLE_OPAQUE_WIN32_KHR → const int
CL_SEMAPHORE_HANDLE_OPAQUE_WIN32_KMT_KHR → const int
CL_SEMAPHORE_HANDLE_SYNC_FD_KHR → const int
CL_SEMAPHORE_PAYLOAD_KHR → const int
CL_SEMAPHORE_PROPERTIES_KHR → const int
CL_SEMAPHORE_REFERENCE_COUNT_KHR → const int
CL_SEMAPHORE_TYPE_BINARY_KHR → const int
CL_SEMAPHORE_TYPE_KHR → const int
CL_SHRT_MAX → const int
CL_SHRT_MIN → const int
CL_SIGNED_INT16 → const int
CL_SIGNED_INT32 → const int
CL_SIGNED_INT8 → const int
CL_SNORM_INT16 → const int
CL_SNORM_INT8 → const int
CL_sRGB → const int
CL_sRGBA → const int
CL_sRGBx → const int
CL_SUBMITTED → const int
CL_SUCCESS → const int
CL_TRUE → const int
CL_UCHAR_MAX → const int
CL_UINT_MAX → const int
CL_ULONG_MAX → const int
CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL → const int
CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL → const int
CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ACCESS_INTEL → const int
CL_UNIFIED_SHARED_MEMORY_CONCURRENT_ATOMIC_ACCESS_INTEL → const int
CL_UNORM_INT16 → const int
CL_UNORM_INT24 → const int
CL_UNORM_INT8 → const int
CL_UNORM_INT_101010 → const int
CL_UNORM_INT_101010_2 → const int
CL_UNORM_SHORT_555 → const int
CL_UNORM_SHORT_565 → const int
CL_UNSIGNED_INT16 → const int
CL_UNSIGNED_INT32 → const int
CL_UNSIGNED_INT8 → const int
CL_USHRT_MAX → const int
CL_UUID_SIZE_KHR → const int
CL_UYVY_INTEL → const int
CL_VERSION_1_0 → const int
CL_VERSION_1_1 → const int
CL_VERSION_1_2 → const int
CL_VERSION_2_0 → const int
CL_VERSION_2_1 → const int
CL_VERSION_2_2 → const int
CL_VERSION_3_0 → const int
CL_VERSION_MAJOR_BITS → const int
CL_VERSION_MAJOR_BITS_KHR → const int
CL_VERSION_MAJOR_MASK → const int
CL_VERSION_MAJOR_MASK_KHR → const int
CL_VERSION_MINOR_BITS → const int
CL_VERSION_MINOR_BITS_KHR → const int
CL_VERSION_MINOR_MASK → const int
CL_VERSION_MINOR_MASK_KHR → const int
CL_VERSION_PATCH_BITS → const int
CL_VERSION_PATCH_BITS_KHR → const int
CL_VERSION_PATCH_MASK → const int
CL_VERSION_PATCH_MASK_KHR → const int
CL_VYUY_INTEL → const int
CL_WGL_HDC_KHR → const int
CL_YUYV_INTEL → const int
CL_YV12_IMG → const int
CL_YVYU_INTEL → const int
deviceTypeMap → const Map<int, DeviceType>

Typedefs

cl_accelerator_info_intel = cl_uint
cl_accelerator_intel = Pointer<_cl_accelerator_intel>
cl_accelerator_type_intel = cl_uint
cl_addressing_mode = cl_uint
cl_bitfield = cl_ulong
cl_bool = cl_uint
cl_buffer_create_type = cl_uint
cl_channel_order = cl_uint
cl_channel_type = cl_uint
cl_char = Int8
cl_command_buffer_info_khr = cl_uint
cl_command_buffer_khr = Pointer<_cl_command_buffer_khr>
cl_command_buffer_properties_khr = cl_properties
cl_command_queue = Pointer<_cl_command_queue>
cl_command_queue_capabilities_intel = cl_bitfield
cl_command_queue_info = cl_uint
cl_command_queue_properties = cl_bitfield
cl_context = Pointer<_cl_context>
cl_context_info = cl_uint
cl_context_properties = IntPtr
cl_device_id = Pointer<_cl_device_id>
cl_device_info = cl_uint
cl_device_partition_property = IntPtr
cl_device_partition_property_ext = cl_ulong
cl_device_type = cl_bitfield
cl_event = Pointer<_cl_event>
cl_event_info = cl_uint
cl_external_semaphore_handle_type_khr = cl_uint
cl_filter_mode = cl_uint
cl_gl_context_info = cl_uint
cl_gl_object_type = cl_uint
cl_gl_texture_info = cl_uint
cl_GLenum = UnsignedInt
cl_GLint = Int
cl_GLsync = Pointer<__GLsync>
cl_GLuint = UnsignedInt
cl_half = Uint16
cl_image_desc = _cl_image_desc
cl_image_format = _cl_image_format
cl_image_info = cl_uint
cl_image_pitch_info_qcom = cl_uint
cl_image_requirements_info_ext = cl_uint
cl_import_properties_arm = IntPtr
cl_int = Int32
cl_kernel = Pointer<_cl_kernel>
cl_kernel_arg_info = cl_uint
cl_kernel_exec_info = cl_uint
cl_kernel_exec_info_arm = cl_uint
cl_kernel_info = cl_uint
cl_kernel_sub_group_info = cl_uint
cl_kernel_work_group_info = cl_uint
cl_map_flags = cl_bitfield
cl_mem = Pointer<_cl_mem>
cl_mem_advice_intel = cl_uint
cl_mem_ext_host_ptr = _cl_mem_ext_host_ptr
cl_mem_flags = cl_bitfield
cl_mem_info = cl_uint
cl_mem_info_intel = cl_uint
cl_mem_migration_flags = cl_bitfield
cl_mem_migration_flags_ext = cl_bitfield
cl_mem_object_type = cl_uint
cl_mem_properties = cl_properties
cl_mem_properties_intel = cl_properties
cl_mipmap_filter_mode_img = cl_uint
cl_mutable_command_khr = Pointer<_cl_mutable_command_khr>
cl_ndrange_kernel_command_properties_khr = cl_properties
cl_pipe_info = cl_uint
cl_pipe_properties = IntPtr
cl_platform_id = Pointer<_cl_platform_id>
/
cl_platform_info = cl_uint
cl_profiling_info = cl_uint
cl_program = Pointer<_cl_program>
cl_program_build_info = cl_uint
cl_program_info = cl_uint
cl_properties = cl_ulong
cl_queue_properties = cl_properties
cl_queue_properties_khr = cl_properties
cl_sampler = Pointer<_cl_sampler>
cl_sampler_info = cl_uint
cl_sampler_properties = cl_properties
cl_semaphore_info_khr = cl_uint
cl_semaphore_khr = Pointer<_cl_semaphore_khr>
cl_semaphore_payload_khr = cl_ulong
cl_semaphore_properties_khr = cl_properties
cl_short = Int16
cl_svm_mem_flags = cl_bitfield
cl_svm_mem_flags_arm = cl_bitfield
cl_sync_point_khr = cl_uint
cl_uchar = Uint8
cl_uint = Uint32
cl_ulong = Uint64
cl_ushort = Uint16
cl_version = cl_uint
cl_version_khr = cl_uint
clEnqueueReadBuffer_type = int Function(cl_command_queue command_queue, cl_mem buffer, int blocking_write, int offset, int size, Pointer<Void> ptr, int num_events_in_wait_list, Pointer<cl_event> event_wait_list, Pointer<cl_event> event)